Principal SOC Design Architect

We’re looking for an experienced RTL Design Lead with strong leadership in front-end SoC design, from architecture to handoff. The ideal candidate will drive RTL design, integration, and synthesis, ensuring power, performance, and area efficiency while mentoring engineering teams.

Key Responsibilities & Skills :

• Lead RTL design from architecture definition to verified netlist delivery.
• Own IP selection and configuration, balancing power, performance, and area trade-offs.
• Hands-on experience in RTL design, verification, and synthesis with SoC IP integration.
• Establish and maintain design flows : CDC, RDC, LINT, SDC, UPF / CPF.
• Experience with physical synthesis and timing closure.
• Understanding of analog, DFT, and physical design for cross-functional collaboration.
• Excellent communication and mentorship skills for guiding junior engineers.