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▷ (03 / 10 / 2025) Silicon validation Engineer Exp : 3- 8 yrs
LeadSoc Technologies Pvt LtdHyderabad, Telangana, India20 hours ago
Job descriptionStrong knowledge in RTL design and implementation Expertise in FPGA design flow and validation Experience with system-level testing and silicon validation Hands-on exposure to debugging (board level & design level) Familiarity with Xilinx / Intel toolchains Understanding of protocols : PCIe, Ethernet, DDR4 / 5, Memory
Greeting from LeadSOC Technologies_ Hydarabad
Role : Post Silicon Validation Engineer
Experience : 3 – 8 years
Location : Hyderabad, On-site
Notice Period : Immediate Joiners
Responsibilities :
- FPGA Design Flow & Validation
- RTL Design, Implementation, and Protocols (PCIe, Ethernet, DDR4 / 5, Memory)
- Integration-focused role : 80% Integration, 20% Design
- System-level Testing & Design
- Silicon Validation
- Debugging Interfaces and Design-level Debugging
- Board-level Debugging (20 : 80 simple design & debug split)
Requirements :
Regards'
Murali
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Validation Engineer • Hyderabad, Telangana, India