Lead Memory Layout Engineer

The Job Role :

You’ll lead full-custom memory layout work for SRAM compilers, owning layout creation, physical verification, and sign-off quality. This role calls for someone who knows the craft inside out and can turn complex circuits into clean, high-quality layouts.

Responsibilities :

• Full-custom memory layout development for SRAM compiler blocks
• Complete physical verification across EM, IR, LVS, DRC and related flows
• Work closely with circuit, architecture, and verification teams
• Drive layout quality, constraints, and design-rule adherence
• Support optimization, debug, and design-rule closure

Qualifications :