Staff High-Speed Serdes Design Engineer

We are looking for an experienced SerDes Design Engineer to develop next-generation high-speed wireline transceivers and SerDes PHY IPs in advanced nodes.

Responsibilities

• Design TX, RX, CDR, PLL, clocking, DLL, VCO and related high-speed AMS circuits.
• Evaluate topologies to meet power, performance, and area (PPA) goals.
• Perform transistor-level simulations and work closely with layout teams.
• Lead silicon validation, characterization, and debugging.
• Define specifications and collaborate with cross-functional teams.
• Mentor junior engineers and support technical reviews.

Qualifications