Physical Verification lead

About Analog Devices

Analog Devices, Inc. (NASDAQ : ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on and .

JOB Descrition

• Take the leadership role of developing and supporting block and full chip automated physical verification flows and scripts
• Strong fundamentals in physical design verification using Calibre tool.
• Strong experience in multi voltage domain and design experience with multi-million instances.
• Work with the PD team to clean up all DRC / LVS / ESD / ERC / ANT violations and sign off PV for tapeouts
• Experience of working in lower geometries(FinFets) is preferred. Experience is TSMC5nm, TSMC4nm is a plus.
• Automation of DesignREV using TCL scripting is a must.
• Familiarity of PnR flows and tools such as Cadence Innovus is must.
• Knowledge and hands on virtuoso experience is plus.
• Experience in power gating digital designs is a plus.
• Excellent verbal and written communication skills are required.
• Perform block and full-chip physical verification and work with the physical design team to close design issues
• Experience level : 7+ years

Minimum Requirement :

Job Req Type : Experienced

Required Travel : Yes, 10% of the time

Shift Type : 1st Shift / Days

Skills Required

Python, Perl, Tcl Scripting