Analog layout design

You are a passionate and skilled Analog Layout Design Engineer with a keen eye for detail and a deep understanding of advanced semiconductor technologies

You thrive in dynamic environments and possess a strong problem-solving aptitude

With a profound expertise in developing high-quality layouts and physical verification techniques, you are ready to contribute to cutting-edge DDR / HBM / UCIe IP development

You excel in collaboration, fostering accountability and ownership within teams, and have excellent written, verbal communication, and interpersonal skills

Your commitment to diversity and inclusion aligns with Synopsysvalues, and you are eager to work in an environment that welcomes all perspectives, What Youll Be Doing :

Hands-on development of layout for next-generation DDR / HBM / UCIe IPs, Solving complex problems and debugging issues effectively, Executing layout floor planning, routing, and physical verifications to meet stringent quality requirements, Ensuring compliance with DRC, LVS, ERC, and antenna rules, Applying deep submicron effects, floorplan techniques in CMOS, FinFET, and GAA process technologies (7nm and below), Implementing layout matching techniques, ESD, latch-up, EMIR, DFM, and LEF generation, The Impact You Will Have :

Enhancing the performance and reliability of SynopsysDDR / HBM / UCIe IPs, Accelerating the integration of advanced capabilities into SoCs, Reducing risk and improving time-to-market for differentiated products, Driving innovation in semiconductor technology and design, Contributing to the success of SynopsysSilicon IP business, Fostering a collaborative and inclusive work environment, What Youll Need :

BTech / MTech degree in a relevant field, 4+ years of experience in analog layout design, Proven track record in developing high-quality layouts and meeting verification timelines, Strong understanding of deep submicron effects and floorplan techniques, Exposure to layout matching, ESD, latch-up, EMIR, DFM, and LEF generation, Who You Are :

Detail-oriented with excellent problem-solving skills, Collaborative and able to foster accountability and ownership, Strong written, verbal communication, and interpersonal skills, Committed to diversity and inclusion, The Team Youll Be A Part Of :

You will be part of a dynamic team focused on developing next-generation DDR / HBM / UCIe PHY IPs

Our team values innovation, collaboration, and continuous improvement, driving the success of SynopsysSilicon IP business, Rewards and Benefits :

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs

Our total rewards include both monetary and non-monetary offerings

Your recruiter will provide more details about the salary range and benefits during the hiring process,

Skills Required

LVS, ERC, CMOS