Design Verification Engineer

Job Title : DV Engineer – IP / SoC

Location : Noida / Bangalore

Notice Period : Immediate – 15 Days

Experience : 3–5 Years

About the Role

We are looking for a skilled Design Verification (DV) Engineer with hands-on experience in IP and SoC level verification . The ideal candidate should have a strong understanding of digital design concepts, verification methodologies, and industry-standard tools used in semiconductor verification.

Key Responsibilities

• Work on IP and SoC level verification using industry-standard methodologies.
• Develop, maintain and execute verification test plans and environments.
• Debug failures, analyze root causes, and collaborate with design and architecture teams for closure.
• Run simulations, analyze results, and achieve coverage closure for assigned blocks and SoC features.
• Participate in feature integration, regressions, and validation cycles across the verification workflow.

Required Skills & Expertise

Regards

Anil Sheoran

anil@bestnanotech.in

9813621334