Design Verification Engineer

Job description :

Experience : 4 - 8 Years

Location : Bangalore / Hyderabad

UVM, SV and Debugging Skills

• Strong understanding of design verification methodologies (UVM, SV, etc.) .
• Experience with industry-standard protocols (AXI or DDR or PCIe, etc.).
• Familiarity with ASIC and SoC design flows .
• Proficiency in scripting languages.
• Experience with simulation tools and debuggers .
• Strong problem-solving and analytical skills .
• Communication and collaboration skills to work effectively with cross-functional teams