(Only 24h Left) Design Engineer

ACL Digital hiring for below position!

▪️ Must have proven track record of ASIC design on several production tape-outs.

▪️ Experience in Designing RTL block for an SOC.

▪️ Experience in integrating ASIC IP into an SOC.

▪️ Experience with Arm architecture and APB, AXI, CHI protocols.

▪️ Experience with synthesis, static timing analysis & optimizations.

▪️ Experience writing timing constraints and exceptions.

▪️ Experience with automation using scripting techniques such as PERL, Python or Tcl.

▪️ Ability to develop clear and concise engineering documentation.

▪️ Ability to organize and present complex technical information.

▪️ Strong verbal and written communication skills.

▪️ Exhibit strong ownership of tasks and responsibilities.

#asicdesign #socdesign #ipdesign #rtldesign #blockdesign #vlsijobs #jobshyderabad #vlsihyderabad #semiconhiring