Field-Programmable Gate Arrays Engineer
ACL DigitalHyderabad, Telangana, India30+ days ago
Job description
FPGA / DV Engineers
Location : Hyderabad
Experience : 2-4 years
We are looking for some background of scripting and or conceptual understanding of Power for experienced candidates.
- FPGA architecture
- Vivado Flow
- Scripting and automation
- Verilog / VHDL
- HW debugging
Interested,please share your updated resume to janagaradha.n@acldigital.com
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Engineer • Hyderabad, Telangana, India
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