Looking forward to work on conceptualizing, designing and productizing state of the art Monitor IP to be used in SLM monitors realized though ASIC design flow.
Work on Architecting sensing elements for on-chip Process, Voltage, Temperature, glitch and Droop monitors for monitoring silicon biometrics. You will be the part of SLM team.
Individual should have strong technical experience in full custom mixed-signal circuit design, circuit simulations, working knowledge of custom layout, and pre-post-silicon characterization.
Additional responsibilities include :
Development of statistical simulation methodologies.
Liaising with layout team to achieve best possible design solution.
End to end ownership of the designed custom cells.
Deployment of new circuits into test chips and post-silicon characterization
Architecting new sensors and enhancing existing ones through collaboration with other architects and stakeholders.
Building and refining design flows to enhance efficiency and effectiveness.
Conducting pre and post-layout simulations and characterization across various design corners.
Ensuring designs meet advanced finfet / GAA reliability and aging, reliability and Automotive grade requirements
Working closely with the RTL, Verification and Physical Design teams for ensuing integration and Quality.