(18 / 10 / 2025) Verification Engineer

We’re Hiring | Formal Verification Engineer

Location : Bengaluru

Experience Required : 5+ years

Employment Type : Full-time

Are you passionate about solving complex verification challenges? We are looking for an experienced Formal Verification Engineer to join our team and contribute to industry-leading projects.

Minimum Qualifications :

• Bachelor’s degree in Computer Science, Computer Engineering, or a related technical field (or equivalent practical experience)
• 5+ years of hands-on experience in Formal Verification
• Strong expertise in Formal Verification applications including Datapath, Sequential Equivalence, Xprop, Clock Gating, and Connectivity
• Deep understanding of Formal Verification methodologies, complexity reduction, and abstraction techniques
• Strong analytical and problem-solving skills to handle complex industry-level designs
• Experience collaborating with cross-functional engineering teams
• Proficiency in SystemVerilog, SVA, and scripting languages such as Python, Perl, or Tcl
• Hands-on experience with JasperGold or VC Formal

Preferred Qualifications :

✨ If you’re ready to take on challenging verification projects and grow your expertise in cutting-edge technology, we’d love to hear from you!

Apply directly or share your resume at :

bhargav@metavlsi.com / komal.dalwai@metavlsi.com

Keywords : Hiring, Formal Verification, SystemVerilog, SVA, JasperGold, VC Formal, Python, Verification Engineer, Embedded, SoC Design, Hardware Verification, Careers, DV, VLSI, Semiconductor, Metavlsi.