STA / Synthesis Engineer

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SMTS SILICON DESIGN ENGINEER(Timing Constraints / STA Signoff Technical Lead)

The Role

As a member of the AECG ASIC Group, you will help bring to life cutting-edge designs. As a member of the Back-end design / integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

The Person

A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

Key Responsiblities

• Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff
• Ensuring constraints quality (SDC) using industry tools like Fishtail , GCA
• Well versed with timing signoff methodology and corner definitions
• Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks
• Requires a mix of SDC knowledge, EDA timing tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scripts)
• Responsible for Timing closure of one or multiple sub chip / subsystem OR Full chip.
• Ensuring full chip level Interface timing closure along DRV closure
• Generating timing ECO using tools DMSA / Tweaker and leading subsystem / Subchip / FC timing closure

Preferred Experience

Ghz range )

Academic Credentials

Benefits offered are described : AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

Skills Required

primetime, spyglass, SDC, Timing Constraints, Tcl Scripting