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Asic Physical Design
DevloiTDehra Dūn, Republic Of India, IN9 days ago
Job descriptionStrong expertise in Cadence Innovus (P&R), Genus (Synthesis), and Tempus (STA). Solid understanding of ASIC design flow, timing concepts, and PPA (Power / Performance / Area) trade-offs. Hands-on experience with advanced technology nodes (7nm / 5nm / 3nm). Proficiency in scripting languages : TCL, Perl, or Python. Familiarity with DFT methodologies, IR-drop analysis, and signal-integrity checks. Strong analytical and problem-solving skills with ability to work in fast-paced design cycles. Duration : 1 Year (Extendable Contract) Location : Bangalore, India Full-time engagement through contractual mode.
Position : ASIC Physical Design Engineer
Location : Bangalore, India
Employment Type : Long Term Contract
Minimum Experience : 4 Years+
About the Role
We are seeking a highly skilled ASIC Physical Design Engineer. The ideal candidate will have strong hands-on experience in P&R, STA, and synthesis tools, along with a deep understanding of modern technology nodes and design challenges.
Key Responsibilities
- Perform floor planning, placement, CTS, routing, and sign-off using industry-standard tools.
- Drive timing closure, power optimization, and design convergence across advanced nodes.
- Execute static timing analysis (STA), support synthesis, and collaborate with RTL and DFT teams.
- Run DFT, IR-drop analysis, EM / IR checks, and signal integrity verification.
- Develop and maintain automation scripts (TCL, Perl, Python) to improve design efficiency.
- Work closely with cross-functional teams to ensure design quality and meet project schedules.
Required Skills & Experience
Contract Details
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Asic Physical Design • Dehra Dūn, Republic Of India, IN
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