RTL Engineer

Job Description :

Understand customer’s requirements / specifications / tender enquiry. Define DSP, System and Board architecture.

Project ownership from concept to delivery. This includes identifying risks, dependencies, creating mitigation plan, tracking project schedule, discussions with customers, design reviews.

Partition the algorithms for implementing in FPGA and / or in SW. Identify the building blocks & Signal Processing functions.

Provide estimates on FPGA resources, computation bandwidth, and memory bandwidth.

Create module level details from architecture, coding, simulation and perform peer reviews. Apply the methodologies for design, verification or validation.

Define, create and maintain all project related documentation, especially design documents with detailed analysis reports.

Provide support to customer during integration phases at test sites and support to production teams.

Defining the architecture of RTL functions

HDL Coding

Simulation and Implementation

Testing on board and debugging

Professional Skills :

VHDL Knowledge

Xilinx tools for synthesis and implementation

Thorough understanding of Xilinx FPGA’s

Functional Simulation

Hardware Design : Logic Design & Debugging expertise

FPGA Design : VHDL / Verilog RTL Coding, System C / System Verilog

FPGA Synthesis & PAR Tools

Implementing DSP algorithms in FPGA environment for Radar and Electronic Warfare systems.

Modeling the algorithms in Octave / MATLAB, generating test vectors, visualizing data.

Working knowledge on interfacing with ADCs and DACs and interpreting their performance.

Fluency, good communication & presentation skills.

Configuration / Version control tools like SVN