FPGA RTL Design Engineer / Senior Engineer

This role is for an FPGA RTL Design Engineer / Senior Engineer to contribute to IP and sub-system development and integration. The ideal candidate will have extensive experience in logic design, RTL coding, and FPGA implementation, with a focus on creating high-performance digital designs and achieving successful FPGA prototyping.

Responsibilities

• Responsible for IP / sub-system level micro-architecture development and RTL coding .
• Prepare block / sub-system level timing constraints .
• Integrate IP / sub-system into larger designs.
• Perform basic verification in either an IP Verification environment or on an FPGA.

Skills

Qualifications

Skills Required

fpga prototyping , Microarchitecture, Verilog, Logic Design, RTL Coding