Senior Engineer

Job Title : Analog Layout Engineer

Location : Bangalore

Department :

ASIC / SoC Design / Physical Design

Experience :

3+ years in analog IC layout

Key Responsibilities :

Perform detailed transistor-level analog and mixed-signal layout for ASIC and IP design projects.

Ensure layout designs meet electrical specifications, design rules, and foundry requirements.

Collaborate with circuit designers to understand schematic intent and optimize layout for performance, noise, matching, and parasitic effects.

Conduct design rule checks (DRC), layout versus schematic (LVS), and parasitic extraction (PEX) to validate layouts.

Participate in design reviews and provide layout feedback to improve circuit robustness.

Identify and resolve layout-related issues impacting timing, noise, and signal integrity.

Assist in the development and improvement of analog layout methodologies and best practices.

Work with verification and manufacturing teams to support tapeout and post-silicon validation.