Manager Verification

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

Design verification engineer Lead

THE ROLE :

This is a ASIC Hardware and Firmware Co-Verification Engineering role with the Security IP Team (SECIP). The primary focus of this role is to Lead the team responsible for Hardware / Firmware co-verification of various embedded micro-processor subsystems and the associated hardware accelerators in leading edge SOC's. The preferred candidate will also have proven experience in Firmware development and the ability to contribute to Firmware development initiatives. These IP subsystems provide high performance functions to the respective SoC, such as security policy management, cryptography, data compression, high throughput DMA, etc.

THE PERSON :

You will have strong analytical / problem solving skills, high attention to detail, and motivation to independently drive tasks to completion. You will also have p rofessional interpersonal and communication skills. If this sounds like a role you are interested in, we welcome you to apply!

KEY RESPONSIBILITIES :

• Development and verification of embedded firmware for SOC secure boot and embedded microprocessor driven hardware acceleration services for cryptography, decompression and large scale DMA functions.
• Hardware / Firmware co-verification in UVM System Verilog and C-DPI structured testbench.
• Hardware / Firmware co-verification in FPGA hardware prototype platform.
• Develop and maintain subsystem verification architecture, testbench, test methodology for

Embedded CPU and subcomponent IPs with

Create abstracted FW and HW performance models

Develop FW / HW co-verification methodology

Develop and maintain subsystem level integration scripts

Define and develop IP level DV API to support SoC level DV effort

PREFERRED EXPERIENCE :

ACADEMIC CREDENTIALS :

LOCATION : Bangalore

Benefits offered are described : .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

Skills Required

Python, Assembly, Verilog, System Verilog, AHB, C, make, Perl, Axi, AMBA