Design Verification Engineer

Experience : 3.00 + years

Salary : INR 2680000-3750000 / year (based on experience)

Expected Notice Period : 30 Days

Shift : (GMT+05 : 30) Asia / Kolkata (IST)

Opportunity Type : Remote

Placement Type : Full Time Permanent position(Payroll and Compliance to be managed by : Architect Labs)

• Note : This is a requirement for one of Uplers' client - Architect Labs)

What do you need for this opportunity

Must have skills required :

Data Analytics, emulation, Tape-out, SystemVerilog, testbench, UVM / OVM, VCS, Python, design verification, SoC Design

Architect Labs is Looking for :

As a Design Verification Engineer at Architect Labs , you'll redefine the hardware design and verification process, methodology, and tools using our proprietary AI models and systems. In that context, we are seeking mid-level front-end hardware engineers to help build and curate high-quality RTL and verification datasets for AI training and evaluation. You'll work on test-benches, coverage analysis, assertion coding, debug-

friendly measurements, curation, and labeling of AI-generated collateral.

Responsibilities

What We'd Like to See

Requirements

Education

Preferred :

Collaboration & Time Zone

Interview Process

How to apply for this opportunity

About Uplers :

Our goal is to make hiring reliable, simple, and fast. Our role will be to help all our talents find and apply for relevant contractual onsite opportunities and progress in their career. We will support any grievances or challenges you may face during the engagement.

(Note : There are many more opportunities apart from this on the portal. Depending on the assessments you clear, you can apply for them as well).

So, if you are ready for a new challenge, a great work environment, and an opportunity to take your career to the next level, don't hesitate to apply today. We are waiting for you!

Skills Required

Design Verification, Ovm, Vcs, SOC design, Uvm, Data Analytics, systemverilog, Python