Digital Design Verification Engineer

Lead Design Verification Engineer

Location : Chennai

Experience : 5 to 10 Years

Job Description :

• Develop and execute verification plans for complex SoC designs and IP blocks.
• Architect and implement testbenches using System Verilog and UVM / OVM methodologies.
• Perform RTL verification, simulation, and debugging.
• Collaborate with design, architecture, and software teams to ensure functional correctness.
• Contribute to IP design reviews and sign-off processes.
• Support post-silicon validation and bring-up activities.
• Analyze and verify interconnects, buses (e.G., AMBA AXI / AHB / APB), and bridges for performance and protocol compliance.
• Conduct CPU subsystem verification (ARM / RISCV) including coherency, cache behavior, and interrupt handling.
• Perform power-aware verification using UPF / CPF and validate low-power design intent.
• Execute performance verification to ensure bandwidth, latency, and throughput targets are met.
• Perform Gate level and Timing Simulations to sign off on Timing closure.
• Analyze and verify serial peripherals like (UART / SDIO / SPI) and validate the Datapath integrity.

Preferred Skills & Experience :

About Company

ACL Digital, part of the ALTEN Group, is a trusted AI-led, Digital & Systems Engineering Partner driving innovation by designing and building intelligent systems across the full technology stack — from chip to cloud. By integrating AI and data-powered solutions, we help enterprises accelerate digital transformation, optimize operations, and achieve scalable business outcomes. Partner with us to turn complexity into clarity and shape the future of your organization.