ASIC Digital Design Engineer, Architect

Understand Standards / functional specifications for the product and write architecture / microarchitecture specifications

Make architecture decisions on the design

Implement RTL design and basic verification

Work with the verification team to define the verification requirements

Perform technical lead role

Key Qualifications

Must have BSEE in EE or MSEE with 20+ years of experience in the following areas :

Knowledge of one or more of protocols DDR / PCIE / AMBA (AMBA2, AXI, CHI) / SD / eMMC / Ethernet / USB / MIPI

Hands on experience with creating micro-architecture / detailed design from Functional Specifications

Hands on experience with Verilog / System Verilog coding and Simulation tools

Synthesis flow and static timing flows, Lint, CDC, Formal checking

Prior experience with SVA and formal verification tools is an added advantage

Knowledge of C / C++, TCL, Perl, Python is an added advantage

Ability to work independently, precisely and to drive innovation

Ability to extract detailed product requirements from high-level specification

Good communication skills

Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage

Job Responsibilities And Key Qualifications For Functional Verification

Job Responsibilities

Make architecture decisions on test bench design

Write verification plans and specifications

Implement test bench infrastructure and write test cases

Implement a coverage driven methodology

Perform technical lead role

Key Qualifications

Make architecture decisions on test bench design

Write verification plans and specifications

Implement test bench infrastructure and write test cases

Implement a coverage driven methodology

Perform technical lead role

Must have BSEE in EE with 20+ years of relevant experience or MSEE with 18+ years of relevant experience in the following areas :

Knowledge of one or more of protocols : DDR / PCIE / AMBA (AMBA2, AXI, CHI) / SD / eMMC / Ethernet / USB / MIPI

Hands on experience in creating Test Environment from Functional Specifications using UVM / VMM / OVM, Test Planning, Coverage closure, Assertion based verifications

Proficient in SV and UVM, Object oriented coding and verification

Able to provide verification solutions for productivity, performance and throughput improvement

Knowledge of C / C++, TCL, Perl, Python is added advantage

Ability to work independently, precisely and to drive innovation

In addition, the candidate should have good communication skills, will be a team player and will have good problem solving skills

Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage

Skills Required

Pcie, AMBA, Tcl, Perl