We’re Hiring – Lead Design Verification Engineer @ Eximietas Design!
Position : Lead Design Verification Engineer
Experience : 7+ Years
Locations : Bangalore / Ahmedabad / Pune / Hyderabad
Key Skills :
- Proven experience in Design Verification using SystemVerilog and UVM
- Strong experience in minimum 2 protocols like AXI, AHB, Ethernet, PCIe, UCIe, DDR, USB, NVMe, SATA , etc.
Key Responsibilities & Requirements :
Solid understanding of design concepts and ASIC flowExperience in IP, Subsystem, and SoC verificationExcellent SystemVerilog / UVM coding and debugging skillsHands-on experience with RAL (Register Abstraction Layer) and third-party VIP integrationDeep knowledge of AMBA protocols – AXI, APB, AHBVerification exposure to low-speed peripherals (I2C, SPI, QSPI, DMA, Interrupt Controller, GPIO, UART)Experience with high-speed protocols (PCIe, CXL, Ethernet, USB)Familiarity with memory protocols (DDR, LPDDR, HBM)Proficiency in tools like VCS, Xcelium , and waveform analyzersExperience in GLS and Power-aware Simulation (UPF)Strong analytical, problem-solving, and leadership skillsExperience mentoring junior engineers and leading verification teamsIf you’re passionate about driving verification excellence and innovation — join our growing team at Eximietas Design!
📩 Email : balachowdaiah.p@eximietas.design