RTL Design Engineer - System Verilog

Description :

Key Responsibilities :

• RTL Design & Micro-Architecture
• Develop and implement micro-architecture specifications for complex SoC components.
• Design high-quality RTL using Verilog / SystemVerilog following best practices.
• Work on ARM-based ecosystem components including M7, Coresight, NIC, and AMBA interconnects.

SoC Integration & Debug :

Static Checks & Synthesis :

Required Skills & Experience :

(ref : hirist.tech)