Design Verification Engineer

About the Company

Position- Design Verification Engineers

Location- Chennai, Bangalore, Hyderabad and Noida

About the Role

Exp- 3-5 yrs

Responsibilities

3 to 5 years of Strong knowledge of digital design with IP / SoC level verification

Experience in HVL such as System Verilog, UVM / OVM / System C

Experience in HDL such as Verilog

Knowledge of ARM / DSP CPU architecture, High Speed Peripherals like USB2 / 3, PCIE or Audio / Multimedia

Familiarity with Power-aware Verification, GLS, Test vector generation

Exposure to Version managers like Clearcase / perforce

Scripting language like Perl, Tcl or Python

Qualifications : B.TECH / M.TECH / PHD

Education details

Required Skills

3 to 5 years of Strong knowledge of digital design with IP / SoC level verification, Experience in HVL such as System Verilog, UVM / OVM / System C, Experience in HDL such as Verilog, Knowledge of ARM / DSP CPU architecture, High Speed Peripherals like USB2 / 3, PCIE or Audio / Multimedia, Familiarity with Power-aware Verification, GLS, Test vector generation, Exposure to Version managers like Clearcase / perforce, Scripting language like Perl, Tcl or Python

Pay range and compensation package

As per market standard.

Equal Opportunity Statement

We are committed to diversity and inclusivity.