Senior Staff Engineer Physical Design

Physical Design and Timing closure of Infineon SoCs targeted for IoT and MCU markets.

Job Description

In your new role you will :

• This position is for Physical Design and Timing Closure of complex, low power SoCs targeted for IOT and MCU markets.
• Candidate will be responsible to drive die area, performance, power goals for hierarchical blocks / Top.
• Candidate will work on various stages of physical design implementation which includes floorplanning, IO planning, packager co-design, power grid design, place and route, clock tree synthesis, timing closure, Static / Dynamic IRdrop, physical verification checks.
• Candidate is expected to have deep understanding and hands-on experience in implementing SOCs with multiple voltage islands, power islands and other power reduction techniques.
• Candidate should have good understanding of IO planning, package co-design aspects.
• Candidate is expected to drive flow / methodology activities to improve upon QoR.

Your Profile

You are best equipped for this task if you have :

Contact : [HIDDEN TEXT]

#WeAreIn for driving decarbonization and digitalization.

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.

Are you in

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Skills Required

Physical Verification, Physical Design, floorplanning, Timing Closure, Place And Route, Clock Tree Synthesis