Senior Design Verification Engineer

TITLE : Design Verification Engineer

LOCATION : GREATER HYDERABAD AREA

Company Description

We are a technology consulting company delivering best-in class Chip Design Services.

Founded in 2008, we partner with top semiconductor companies in building a connected, safer tomorrow. With over 40+ tapeouts and expertise spanning the breadth of chip design, we offer a wide variety of Semiconductor skills

Job Description

Exposure to various interface IP like I2C / SPI / UART / USB / NVM / PCIe; Buses AXI / AHB / APB; ARM based SoC designs is needed.

Skills :

• Overall 5-10 years industry experience with atleast 3+ years in Design Verification using System-Verilog / C / UVM.
• Generic knowhow on Digital Design and Verification methodologies.
• Experience in System Verilog / UVM based IP / SoC verification using advanced technologies.
• Good understanding of Constraint based Random verification; VIP coding; Test Plan design; Test cases coding; Coverage strategies and measurement
• Proficient in EDA tools used for Design Verification (e.g. Cadence / Mentor / Synopsys simulation suites; Verilator).
• Working knowledge of Unix, Linux and SKILL, Shell / Python Script ability.
• Quick learner with excellent interpersonal, verbal / written communications, problem solving and decision-making skills

Traits :

Contact

Sumit S. B.

"Mining the Knowledge Community"

Practice Head(Talent Acquisition. Semiconductors Domain)