EMULATION ENGINEER

We are seeking a medium-sized Contingent Workforce (CW) skilled SOC Verification Engineers to support the Diamond Rapids (DMR) System-on-Chip (SOC) verification project. This critical initiative focuses on ensuring the functional correctness and performance of next-generation server and client SOCs. The team will play a pivotal role in simulation and emulation-based verification, directly contributing to the successful deployment of advanced semiconductor solutions.

Detailed Responsibilities

• Collaborate with architects, designers, and verification leads to define verification strategies for the DMR SOC.
• Develop, implement, and maintain System Verilog (SV) and UVM-based testbenches for comprehensive SOC functional verification.
• Execute simulation-based verification (70%) and emulation-based verification (30%) to validate complex SOC designs.
• Generate and debug test cases, analyze coverage metrics, and identify design issues or bottlenecks.
• Document verification plans, procedures, and results for internal and client-facing reports.
• Participate in regular technical reviews, status meetings, and cross-functional collaboration to ensure project milestones are met.
• Contribute to the continuous improvement of verification methodologies, flows, and best practices.

Skill Requirements

Other Requirements (Optional)