Senior Design-for-Debug Verification Engineer

Job Responsibility

• Pre-silicon system verification. This include SoC, FPGA & Full Chip design verification.
• Create testcase and testbench with UVM methodology
• Fullchip / system functional verification, by defining verification strategies / methodology and test plan to enable effective verification
• Coordinate / interface cross functional efforts with Design, SW, Architecture team to achieve full coverage verification plan
• Experience on Emulation will be an add on.

Qualifications :