IP / SOC Verification Engineer

Job Title : IP / SS / SoC Verification Engineer (Hybrid – Bangalore / Hyderabad)

Experience : 4 to 15+ years

Notice Period : Strictly less than 30 days

Work Type : Hybrid

Location : Bangalore / Hyderabad

Job Description

We are looking for talented SoC Verification Engineers with strong expertise in SystemVerilog / UVM , solid debugging skills, and a deep understanding of verification methodologies. The role involves hands-on contribution to IP, Sub-system, and SoC-level verification and end-to-end ownership of verification deliverables.

Key Responsibilities

• Develop and execute SystemVerilog / UVM-based verification environments for SoC and IP-level designs.
• Create and maintain verification plans , testbenches, and functional coverage models .
• Perform RTL and Gate-level debugging using industry-standard tools.
• Collaborate with design and architecture teams for feature understanding and issue resolution.
• Lead test planning, task assignment, progress tracking, and delivery of verification tasks.
• Drive coverage closure, regression management, and maintain documentation.

Required Skills

Preferred Skills

Soft Skills

Additional Information

Referral / Contact Details

If you have the required skill set as per the JD or know someone who fits the role, please apply or refer suitable candidates to :

📧 Email : prabhu.p@acldigital.com

📱 WhatsApp : +91 87543 87484