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RTL Architect
Mirafra Technologiesthane, maharashtra, in1 day ago
Job descriptionExcellent communication and interpersonal skills. Ability to collaborate in a fast-paced, product-oriented, and distributed team environment. Micro Architecture Development : Ability to develop micro-architecture based on specifications. Bus Protocols & Peripherals : Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc. Memory Controllers & Microprocessors : Experience with memory controller designs and microprocessors is an advantage. Chip IO Design : Knowledge of chip IO design and packaging is beneficial. Test Plans & Verification : Proficient in reviewing high-level test plans and coverage metrics. Synthesis & Formal Verification : Expertise in Design Compiler Synthesis and formal verification using LEC. Timing Closure : Comprehensive understanding of timing closure is mandatory. Post-Silicon Debug : Experience in post-silicon bring-up and debugging
Experience : 8 to 15 years
Expertise :
- Strong understanding of the design convergence cycle, including architecture, micro-architecture, Verification, Synthesis and timing closure.
- Expertise in managing IP dependencies, as well as planning front-end design tasks.
- Design and development of high-speed serial IO protocols
- Implementation of clock rate compensation FIFO, gearbox design for data width, bypass on controller, power gating, low power modes
- Experience in CPU, bus fabrics, or coherence / noncoherent NOC domains is highly desirable.
Skills :
Minimum Qualifications :
Regards,
Puja Saha
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Architect • thane, maharashtra, in
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