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Design Verification Engineer - System Verilog

Design Verification Engineer - System Verilog

ARISE TECHGLOBAL PRIVATE LIMITEDBangalore
13 days ago
Job description

Job Description :

We are seeking an experienced Verification Engineer with strong expertise in System Verilog (SV), UVM methodology, and hands-on experience in PCIe (Gen4 / Gen5) verification. The ideal candidate should have worked on Root Complex, PCIe Controller verification and possess deep knowledge of high-speed protocols, functional verification, and test bench development.

Key Responsibilities :

  • Develop and execute test plans for PCIe Gen4 / Gen5 Root Complex and Controller IP.
  • Build, enhance, and maintain UVM-based verification environments in SystemVerilog.
  • Create testbenches, sequences, monitors, scoreboards, and checkers for functional coverage.
  • Perform coverage-driven verification (functional / code / branch / MC / DC) and debug failures using simulation tools.
  • Collaborate with design and architecture teams to understand specifications and identify corner cases.
  • Analyze protocol compliance and ensure design meets PCIe standard specifications.
  • Run regressions, triage failures, and drive resolution in coordination with design teams.
  • Provide technical guidance and mentor junior team members (if senior role).

Required Skills & Experience :

  • Strong knowledge of System Verilog, OOP concepts, and UVM methodology.
  • Hands-on experience in PCIe Gen4 / Gen5 verification (must have worked on Root Complex and / or PCIe Controller).
  • Experience in writing test benches, sequences, assertions, and checkers.
  • Strong debugging skills using industry-standard simulators (e.g., VCS, Questa, Xcelium).
  • Familiarity with protocol analyzers, traffic generators, and PCIe compliance testing.
  • Solid understanding of verification concepts : functional coverage, constraint random testing, assertions (SVA).
  • Good communication skills and ability to work in a collaborative environment.

    • Nice to Have :

  • Exposure to other high-speed protocols (CXL, Ethernet, DDR, etc.).
  • Experience with formal verification and emulation / prototyping platforms.
  • Knowledge of Python / Perl / Tcl scripting for automation.
  • Familiarity with SoC-level verification.

    • Education :

  • Bachelor's or Master's degree in Electronics / Electrical / Computer Engineering or equivalent.

    • (ref : hirist.tech)

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    Design Verification Engineer • Bangalore