(13 / 10 / 2025) Standard Cell Characterization

Development of the standard cell library from scratch and support of existing libraries

PPA tradeoff between different cell circuit architecture in realistic usage environment

Interface with the layout team to define the floor plan and layout guidelines for schematics; layout review to get optimum design

Design and implementation of combinatorial, power management, and sequential circuits

Running equivalence verification (e.g., ESPCV)

Verification of functionality, performance, and power of developed circuits

Characterization and views generation of the libraries with several custom PVT corners

Modeling of new and existing cells to support industry-wide PnR, Simulation, and Signoff tools

Maintain accurate and thorough documentation of work, design flows, and reports

Automation of manual tasks to reduce overall time and effort

Experience with standard EDA tools such as RC-extraction, SPICE simulators, and schematic / layout editors

Working with views like lef, NLDM, CCS, .LIB