Minimum Qualifications :
- Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.
- OR
- Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.
- OR
- PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.
Infra Systems Architect
for the next generation System-on-chip (SoC) for smartphones, tablets and other product categories. This position will be responsible forTechnical and hands on role mainly for high level architecture and micro-architecture development.Design the prototype or experiments for proof of concept for initial power, area or latency benefitsCandidate ready to learn new protocol and sub-systems to support different segments of infra solutionsWork with design team to resolve queries and ensure the completeness of designParticipate in development of the testplan and test scenarios for bug free RTLPreferred Qualifications
8+ years of experience in IP architecture, micro-architecture and design.Good understanding of SOC. Possesses expertise in any one of the following technical areas is a plus : DDR, Interconnects, SOC power management, clock / reset, UBWC, Encryption, ECCUnderstanding of ARM architecture (Coherency, bus interconnects, Security, arch evolution)Good communication and work with minimal supervisionCollaborate with Perf, Design and System team stakeholders in developing solutionsExperience with Verilog, logic design principles with timing, area and power implications.Experience in testplan development, UVM, will be a great assetUnderstanding of interconnect protocols like AHB / AXI / ACE / ACE-Lite / CHI.Good Understanding of concurrency, bandwidth, latency and system level aspectsEducation Requirements : Bachelor's degree in Electrical Engineering required, Master's or Doctorate preferred
Skills Required
Soc, power management, Ddr, Micro Architechture, arm architecture , Axi, AHB