Company Description
Founded by seasoned experts in the embedded and software industries, PTech Soft GmbH emerged in 2023 as a pioneering force in the technology sector. Renowned globally as a front-runner, we specialize in delivering high-performance, top-tier, and fortified solutions, solidifying our stance as the vanguard of innovation.
Role Description
We are seeking a Senior Embedded Engineer with hands-on expertise in GNSS / GPS / RF domain . You will be responsible for designing, implementing, and validating firmware that synchronizes signals between RF front ends, GNSS receivers, and system-level timing units — ensuring microsecond-level accuracy and power-efficient operation. You will collaborate closely with system, RF, and algorithm engineers to realize high-performance and power-optimized embedded firmware architectures for next-generation timing and positioning solutions.
Location : Bangalore
🕒 Experience : 5–15Years
Key Responsibilities Design, develop, and optimize firmware for GNSS, GPS, and RF timing synchronization systems.
- Integrate GNSS base-band and sensor subsystems to achieve accurate time and frequency synchronization.
- Develop firmware control layers for RF front ends, clock calibration, and precision timing correction.
- Work on low-level firmware optimization for latency, jitter, and drift minimization
- Implement device drivers, RF control interfaces, and time synchronization algorithms for SoC and MCU platforms.
- Collaborate with RF and system teams to optimize firmware for phase-locked loops (PLL), oscillator management, and time transfer protocols.
Required Skills & Experience :
Bachelor’s / Master’s in Electronics, Computer Engineering, or Embedded Systems.5–10+ years of professional experience in embedded firmware development using C / C++Strong knowledge of GNSS / GPS systems, timing architectures, and RF front-end control.Experience implementing time synchronization protocols, clock correction algorithms, and frequency calibration.Familiarity with PLL, TCXO, OCXO, and timekeeping components at firmware interface level.Proficiency with RTOS frameworks (FreeRTOS, Zephyr, etc.) and bare-metal systems.Hands-on debugging using JTAG, SWD, logic analyzers, and oscilloscopes.Knowledge of power management, sleep-wake mechanisms, and real-time scheduling.How to apply
👉 If this sounds like you (or someone in your network), share your CV with us at info@ptechsoft.com or connect with us directly.