Synthesis and Static Timing Analysis - Staff Design Engineer / Design Manager [15h Left]

Company : Eteros Technologies India Private Limited

Eteros Technologies, Inc. is a Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd is a wholly owned subsidiary offices in Bangalore, Noida, Hyderabad and Ahmedabad

• Our world-wide customers are amongst The Who's who in the semiconductor industry. Eteros works not only with some of the top 20 semiconductor startups in the world but boasts of customers who are among the most respected publicly traded semiconductor companies.
• Eteros engineers work on cutting edge technology nodes while working on the state-of-the art designs in the AI / ML, Datacenter, Automotive and 5G domains. Eteros engineers work with some of the brightest, innovative and successful engineers and leaders around the world. A one-of-a-kind opportunity where young Eteros engineers showcase their ability and experience world-wide from day 1 while learning from some of the world's most well-respected companies.
• We are not your traditional design services company offering staff augmentation. Eteros engineers are treated as an integral part of the customer team and routinely are responsible for turnkey, end-to-end ownership and delivery, whether it is Implementation, Digital and Mixed Signal Verification, DFT or Analog Design and Layout. Eteros and our engineers work closely with our customers to define and set methodologies and design flows.
• Eteros invests in our engineers. Our engineers are continuously learning, on and off the job. They are able to grow the breadth and depth of knowledge. We believe in preparing our employees for the fast-track in career development as well as longevity

Job Title / Role : Synthesis and Static Timing Analysis - Staff Design Engineer / Design Manager

Location : Bangalore / Hyderabad / Ahmedabad / Noida

Experience Level : 6+ Years

Industry : Semiconductors

Employment Type : Full-time

Job Functions : Engineering

Summary

Join a development team and lead the synthesis, static timing and DFT efforts for an advanced mixed signal chip for a high-profile Silicon Valley startup.

In this highly visible role, as part of a highly talented team you will be at the heart of the Soc design effort interfacing with all disciplines with critical impact in getting functional products to of customers quickly. As a Sr, ASIC STA Engineer, you will be a part of the SOC digital design team responsible for providing integrated solutions into a growth industry

Key Qualifications

The position requires thorough knowledge of the ASIC design timing closure flow and methodology.

Responsibilities Include

What's in it for you