Senior Digital Hardware Design Engineer - SystemVerilog Testbench Development

System Verilog Verification Engineer

We are seeking an experienced SystemVerilog Verification Engineer to join our team. As a key member of our verification group, you will be responsible for developing and implementing test plans, methodologies, and SystemVerilog / Verilog testbenches for SoC integration verification, scenario verification, performance verification, CHI / PCIe / CXL, DDRx / LPDDRx integration verification in SoC RTL.

Responsibilities :

• Develop and implement test plans and methodologies for SoC integration verification, scenario verification, and performance verification.
• Design and develop SystemVerilog / Verilog testbenches for verification of SoC RTL.
• Work with project management and leads on planning tasks, setting schedules, and quality checkpoints.
• Collaborate with design and performance analysis engineers to ensure successful verification of SoC designs.

Requirements and Qualifications :

Nice To Have Skills and Experience :