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Design Verification Engineer

Design Verification Engineer

TessolveBengaluru, India
30+ days ago
Job description

Job Title : IP / SoC Verification Engineer

Experience Level : 5+ Years

Location : Bengaluru, India

Company : Tessolve Semiconductor

Department : ASIC / SoC Design & Verification

Job Type : Full-Time

About Tessolve :

Tessolve is a leading provider of engineering solutions for silicon and system product realization, offering a unique combination of Pre-Silicon (Design, Verification) and Post-Silicon (Test, Validation, Characterization) capabilities. With deep expertise in Semiconductor & Embedded Systems , Tessolve partners with global semiconductor leaders across various domains including automotive, consumer, industrial, and networking.

Job Summary :

We are seeking a skilled and driven IP / SoC Verification Engineer to join our dynamic team in Bengaluru. The ideal candidate will have 5+ years of hands-on experience in functional verification of complex IPs and SoCs , using SystemVerilog and UVM , and should be capable of independently driving verification tasks from planning to sign-off.

Key Responsibilities :

Develop constrained-random and directed testbenches using SystemVerilog / UVM .

Verify complex IP blocks and SoC-level integration , ensuring protocol and interface compliance.

Define detailed verification plans , implement and execute test cases based on specifications.

Perform functional coverage analysis , identify gaps, and close coverage.

Debug simulation failures, triage issues, and work closely with RTL and architecture teams.

Build and maintain regression automation and test infrastructure.

Participate in SoC-level integration testing , including inter-IP connectivity and system scenarios.

Interface with physical design, DFT, and embedded software teams as required.

Contribute to continuous improvement of verification methodology and reuse practices .

Required Skills & Qualifications :

B.E / B.Tech or M.E / M.Tech in Electronics, Electrical, or Computer Engineering.

Minimum 5 years of experience in IP and / or SoC functional verification .

Expertise in SystemVerilog and UVM-based testbench development .

Good understanding of digital design fundamentals and SoC architecture.

Experience in verifying standard protocols like AXI, AHB, SPI, I2C, PCIe , or similar.

Hands-on with industry-standard EDA tools : VCS, QuestaSim, Verdi, DVE, etc.

Familiarity with Scripting languages : Python, Perl, Shell, or TCL for automation.

Preferred Skills :

Exposure to low-power (UPF) or power-aware verification .

Knowledge of formal verification , DFT / DFD , and post-silicon debug .

Experience in emulation platforms or FPGA-based prototyping .

Familiarity with version control tools like Git or Perforce .

Soft Skills :

Excellent communication and teamwork abilities.

Strong analytical and debugging skills.

Self-motivated with a proactive attitude.

Ability to mentor junior engineers or interns.

What We Offer :

Work on cutting-edge SoC / IP designs for top-tier semiconductor clients.

Competitive compensation and performance-based growth opportunities.

Dynamic, collaborative work environment with global exposure.

Access to Tessolve’s full-stack silicon design and post-silicon ecosystem.

How to Apply :

Interested candidates can send their resume to manjula.patil @tessolve.com with the subject line :

Application for IP / SoC Verification Engineer – Bengaluru

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Design Verification Engineer • Bengaluru, India

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