Hardware Verification Engineer

Hi,

Opening for Emulation role - Bangalore

5+ to 15+years

Key Responsibilities

• Develop and execute emulation test plans using Cadence Palladium for large-scale SoC and subsystem verification .
• Build, debug, and maintain emulation environments , including transactors, testbench components, and supporting infrastructure.
• Collaborate with RTL design teams to integrate and validate complex designs on Palladium platforms.
• Perform pre-silicon validation , performance profiling , and power estimation using emulation platforms.

Please share your resume to jayalakshmi.r2@ust.com

Regards,

Jaya