General Summary :
Qualcomm is a global leader driving next-generation innovations in technology, pushing boundaries to enable smarter, connected experiences. As a Qualcomm Hardware Engineer in the DDR Physical Design (PD) team, you will be involved in planning, designing, optimizing, verifying, and testing advanced electronic systems including circuits, mechanical, Digital / Analog / RF / optical systems, test systems, FPGA, and DSP systems. You will collaborate closely with cross-functional teams to meet stringent performance and timing requirements for cutting-edge products.
Positions & Experience Levels :
- Senior Lead : 6 to 8 years of experience (2 openings)
- Staff Engineer : 8 to 10 years of experience (1 opening)
- Senior Staff Engineer : 10 to 12 years of experience (1 opening)
Minimum Qualifications :
Bachelor's degree in Computer Science, Electrical / Electronics Engineering, or related field + 6+ years experienceOR Master's degree + 5+ years experienceOR PhD + 4+ years experience in Hardware Engineering or related fieldKey Technical Skills & Responsibilities :
Static Timing Analysis (STA) :Strong fundamentals in STA timing analysis, including AOCV / POCV concepts, CTS, timing constraints, latch transparency, 0-cycle and multi-cycle path handlingHands-on experience with STA tools like PrimeTime and TempusDriving timing convergence at both Chip-level and Hard-Macro levelSTA setup, convergence, review, and sign-off for multi-mode, multi-voltage domain designs (including Qualcomm Hexagon DSP IPs)Signal Integrity and Parasitics :Deep understanding of cross-talk noise, signal integrity, layout parasitic extraction, and feed-through handlingASIC Back-end Design :Knowledge of back-end flows and tools such as ICC2, InnovusExperience with circuit simulations using Hspice, FineSim, and Monte Carlo methodsCorrelation between silicon and spice simulation modelsScripting and Automation :Proficient in scripting languages : TCL, Perl, AwkExperience with automation scripting for STA and physical design toolsFamiliarity with design automation flows from RTL to GDS (using tools like ICC, Innovus, PrimeTime, Tempus)Process Technology :Basic device physical knowledgeFamiliarity with process technology enablement and related simulationsSoft Skills :Strong technical writing and communication skillsWillingness to work collaboratively in a cross-functional and global environmentSkills Required
Sta, Signal Integrity, Technical Writing, Python, Timing Analysis, Scripting Languages