Experience : 2-3 Years
Location : Hyderabad
Education : B.E. / B.Tech. in ECE / EEE or M.E. / M.Tech. in VLSI / Electronics
Roles and Responsibilities
1. Strong expertise in UVM-based verification.
2. Hands-on IP-level verification exposure and a solid understanding of serial protocols are a must.
Share resumes at raksha.k@acldigital.com
Design Verification Engineer • Hyderabad, Telangana, India