ASIC RTl(Video) design engineer

Skills :

• Strong DSP / Multimedia Domain Knowledge on Video Codecs / Computer Vision along with Hardware Implementation is preferred.
• Experience in micro-architecting & designing complex datapath cores for ASICs / SoCs including AI / ML cores for CV applications
• Experience with RTL coding using Verilog / VHDL / system Verilog
• Familiar with the Synthesis and Formal Verification
• Simulation debugging with Verdi & log file.
• Exposure in scripting
• Familiar with the Linting, CDC, Low Power etc.
• Good team player. Need to interact with the verification engineers proactively
• Ability to debug and solve issues independently

Minimum Qualifications :

• Bachelor's degree in Computer Science, Electrical / Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• OR
• Master's degree in Computer Science, Electrical / Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
• OR
• PhD in Computer Science, Electrical / Electronics Engineering, Engineering, or related field.

Skills Required

Hardware Design, Debugging, Video codec, RTL Coding, Verification