Emulation Engineer | FINJO I982

Emulation Engineer

Experience Required : 4-10 Years

Emulation experience on any / all available platforms (Palladium, Protium, Veloce, or Zebu, EP), including design bring up, build flow, debug, performance and throughput tuning.

Experience with Verilog, VHDL design Knowledge

Experience with C / C++, DPI and System Verilog add-on.

Experience writing scripts using any language (Perl, Python, Makefile )

Experience with waveform debug tools, Verdi / Sim Vision.

Knowledge of communication / Interface protocols, like (PCIE, USB ), DDR, SPI

Strong communication skills and the ability to work as a team

Bachelors degree and a minimum of 4 years of relevant industry experience.