VLSI Design Engineer
ACL DigitalBengaluru, Republic Of India, IN30+ days ago
Job description
Hi Folks
ACL Digital is Hiring!
Experience : 4 - 5+ Years
Location : Bangalore / Hyderabad
Looking : Immediate to 20 days
Hiring | RTL Design Engineer
Strong experience in RTL Design using Verilog / System Verilog
Exposure to complex SoC / ASIC design and integration
Hands-on with synthesis, Lint, CDC preferred
Share resume at himabindu.jeevarathnam@acldigital.com
#RTLEngineer #ACLdigital #VLSIJobs #ASICDesign #Verilog #SystemVerilog
#SoC
Thanks,
K Himabindu
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Design Engineer • Bengaluru, Republic Of India, IN
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