Senior Design Verification Engineer

Job Title : Design Verification Engineer

Location : Bangalore, KA, India

Description :

Client is seeking a Design Verification Engineer. The role is technical, hands-on, in charge of the verification environment for new silicon projects and developments. We are looking for an experienced professional with Passion & Drive to succeed.

Primary Responsibilities Include :

• Responsible for all aspects of verification methodology employed and for ensuring the application of uniform standards and adoption of best practices.
• Work and liaison with other Design Verification teams within our customer sites to identify holes in the design verification flow and implement corrective action.
• Overall, responsible for verification of ASIC designs To include such things as :
• Design Verification – Implement test benches in UVM and Sytem
• Verilog, run regressions at RTL and gate level, generate and report DV metrics with respect to bug tracking and code coverage, debug failures and provide feedback to the design team.
• Responsible for oversight and completion of debugging problems and troubleshooting in Real Time. This includes being responsible for
• Debugging Designs for High throughput, Low Latency of Pipeline and
• Dynamic Power Management at full system level.
• Setup Verification Regression suites at RTL Level & Corresponding
• Netlist Level after Synthesis to test any / all Corner case conditions.
• Work closely with Socionext’s design team to ensure the Company is meeting design requirements for projects.
• This may include : review of specifications, understanding chip architecture, developing tests & coverage plans, and defining methodology & test benches.
• Work closely with Socionext’s Custom SoC department to provide great customer service to our clients and the projects at hand. Support, encourage and drive timely and accurate deliverables with customers within schedules

Necessary Qualifications :

Other Qualifications :