ASIC SOC RTL Design Lead (Micro-architecture)

Hi All,

Greetings' from Eximietas Design....!

We are Hiring ASIC SOC RTL Design Engineer / Leads.

Job Title : ASIC SOC RTL Design Engineer / Leads ..!

Experience : 8+ Years.

Location : Visakhapatnam.

Job Description :

Eximietas Design is seeking an experienced and highly skilled ASIC SOC RTL Design to join our growing team. As a key contributor, you will play a critical role in defining and implementing the microarchitecture of cutting-edge semiconductor designs. You will work on complex RTL design challenges, collaborate with cross-functional teams, and contribute to the delivery of high-performance, power-efficient, and innovative solutions.

Key Responsibilities :

• Define and develop microarchitecture specifications for complex SoC designs.
• Lead RTL design and implementation using Verilog / SystemVerilog, ensuring optimal performance, power, and area (PPA).
• Collaborate with system architects, verification teams, and physical design teams to ensure successful project execution.
• Perform design trade-off analysis to meet functional, performance, and power requirements.
• Develop and implement design methodologies to improve efficiency and quality.
• Mentor and guide junior engineers, fostering a culture of innovation and excellence.
• Participate in design reviews, provide technical leadership, and ensure adherence to project timelines.

Qualifications :

What We Offer :

Interested Engineers please share your updated resume : [HIDDEN TEXT]

Skills Required

systemverilog, Rtl Design, Logic Synthesis, pipelining , Caching, Perl, Verilog, Python, Tcl