▷ [15 / 10 / 2025] Post Silicon validation Engineer Exp : 6-8 yrs

Greeting from Leadsoc Technologies

Position : Post silicon validation Engineer -Hyderabad

Strong knowledge in RTL design and implementation

Expertise in FPGA design flow and validation

Experience with system-level testing and silicon validation

Hands-on exposure to debugging (board level & design level)

Familiarity with Xilinx / Intel toolchains

Understanding of protocols : PCIe, Ethernet, DDR4 / 5, Memory

Exp : 6- 8 yrs

Notice : 0-15 days only.

Regards

Murali