SRAM memory compiler development Project Lead

UST Malaysiadehradun, uttarakhand, in

4 days ago

Job description

UST is looking for an experienced and hands-on Project Lead to drive Memory Compiler Development. The ideal candidate will have 8+ years of expertise in full custom memory design , including architecture, layout, characterization, and verification at the compiler level. This leadership role requires strong technical depth and the ability to manage cross-functional teams, project plans, risk mitigation, and quality assurance in a fast-paced environment.

Work location : Remote / onsite from Vietnam / Singapore / Malaysia

Key Responsibilities :

Lead end-to-end SRAM memory compiler development , including :
Full custom memory architecture design
Layout design , netlisting , and characterization
Compiler-level (not just instance-level) verification of both design and layout
Define, maintain, and track :
Execution Plans and project schedules
Design Quality Plans (DQP)
Design Failure Mode and Effects Analysis (DFMEA)
Risk identification , tracking, and mitigation strategies
Project health reports for stakeholders
Collaborate with design, layout, verification, and test teams across multiple geographies
Drive technical reviews, sign-offs, and ensure high-quality deliverables
Mentor junior team members and foster a high-performance culture

Required Qualifications :

8+ years of hands-on experience in :

Full custom memory design and compiler architecture

SRAM design at compiler level

Layout development and custom netlisters

Memory characterization tools and flows

Comprehensive design and layout verification

Deep understanding of EDA tools for layout, simulation, and verification (Cadence, Synopsys, etc.)

Strong understanding of design quality methodologies , DFMEA , and ISO / IEC standards

Proven ability to lead multi-disciplinary teams and complex projects

Excellent communication, documentation, and reporting skills

Preferred Qualifications :

Experience in low-power memory designs and advanced process nodes (7nm, 5nm, etc.)

Familiarity with silicon validation and test strategies

Exposure to compiler automation and flow optimization

How to Apply :

If you're ready to take the lead in cutting-edge memory compiler development, connect with us today!

📱 WhatsApp : +84 935059669

📧 Email : anh.thivannguyen@ust.com

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Project Lead • dehradun, uttarakhand, in