Experience
Role :
IP / SOC design engineer working in the area of micro architecture, logic design, RTL
coding, verification, supporting validation / software, silicon implementation support
activities (ex : synthesis, timing, DFT,p&r)
Job Requirements :
3+ years of hands-on experience with SoC designWorked on DDR / LPDDR / PCI Express / USB 2.0,3.0 protocolsexperience with MCU and APU class processorsexperience with AXI / AHB or other standard on-chip busesGood knowledge of processor based SoC architectureExcellent debugging skillsBroad understanding of RTL-to-Tapeout methodologyPrior experience with pre and post silicon debugNice to have :
Prior experience with QSPI, PSRAM, low power implementationsHands-on experience with Synthesis and Logic Equivalency checkingHands-on experience with FPGA debugExperience with Verilog / PSL / OVA assertionsEssential Requirements :
BTech / MTech in EE or equivalent with 3-7 years of experienceOutstanding analytical and critical thinking skills.Be a good contributor to the organization and a team player