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Physical Design Engineer,Senior

ConfidentialBengaluru / Bangalore

30+ days ago

Job description

Minimum Qualifications :

Bachelor's degree in Computer Science, Electrical / Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical / Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical / Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Preferred Qualifications :

Bachelors or Master's degree in Computer Science, Electrical / Electronics Engineering, Engineering

5+ years of Hardware Engineering or related work experience.

1+ year in a technical leadership role with or without direct reports.

Principal Duties and Responsibilities :

5-7 years of relevant experience in ASIC Physical Verification

Good understanding of overall design Flow from RTL to GDS.

Hands on Experience on Physical Verification closure of full chip & Hierarchical Designs

Hands on DRC & LVS Experience on Lower node Technologies with Synopsys / Cadence / Calibre Tools

Good knowledge on PnR flow, ECO implementation

Knowledge on Perl / TCL scripting language , SVRF coding is advantage

Experience on multi voltage designs

Good understanding of other domains of signoff of in Physical Design (STA / PV / IR / FV / CLP)

Responsibilities

Responsible for Block / Chip Tile PV closure to achieve the best PPA

DRC & LVS closure for Block and Full Chip for complex hierarchical Designs in 4nm / 3nm nodes

Interaction with IR, IP , ESD & PD teams for Physical Verification Convergence & Resolving Conflicts

Able to work on multiple blocks at same time with minimal supervision

Responsible for Full Chip LVS & DRC closure

Responsible for Analog integration closure for all IP's used in SOC

Skills Required

power analysis, Dsp, C++, Soc, Physical Design, Floorplan, Route, formal verification, Python, Fc, Tcl

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Design • Bengaluru / Bangalore

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