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Mixed-Signal IP Technical Manager
Mixed-Signal IP Technical ManagerMulya Technologies • Bengaluru, Republic Of India, IN
Mixed-Signal IP Technical Manager

Mixed-Signal IP Technical Manager

Mulya Technologies • Bengaluru, Republic Of India, IN
4 days ago
Job description

Analog Circuit Design Technical Lead

Location : Greater Bengaluru Area

GLOBAL MNC :

Our main business focuses on automotive microcontrollers and SoCs. The solutions cover a wide range, such as Edge-ECU to ADAS applications, dedicated to creating a comprehensive solution for automotive chips.

It will continue to integrate the latest electronic and electrical architecture (E / EA) designs from automakers, realize the demands of the next-generation software-defined vehicle, and apply a chip design-oriented, human-centric service-oriented architecture (SOA) to the automotive field. This approach aims to meet the diverse needs of users and provide consumers with a new user experience.

We are seeking a highly experienced Analog Circuit Design Technical Lead with 15+ years of proven expertise in the design, development, and productization of advanced analog and mixed-signal IPs for high-performance semiconductor solutions. The candidate will be responsible for Analog Design, driving innovation, ensuring robust design execution, and collaborating with cross-functional teams to deliver state-of-the-art silicon.

Key Responsibilities

  • Technical Leadership
  • Lead and mentor the analog design team, providing architectural, circuit-level, and system-level guidance.
  • Drive innovation in high-speed and low-power analog design for cutting-edge SoCs.
  • Define design methodologies, best practices, and ensure technical excellence across the team.
  • Design Ownership
  • Lead the design and development of analog IPs such as SerDes (PAM4 / NRZ), ADCs, DACs, PLLs, LDOs, CDRs, Tx / Rx front-ends, clock / data recovery circuits, and other high-performance analog building blocks.
  • Oversee schematic design, transistor-level simulations, layout, parasitic extraction, and verification.
  • Guide architecture trade-offs to balance performance, power, area, and manufacturability.
  • Cross-functional Collaboration
  • Work closely with digital design, verification, system, packaging, and technology teams to ensure seamless integration of analog IPs into SoCs.
  • Partner with foundries and EDA vendors to leverage advanced process technologies (FinFET, advanced CMOS, etc.).
  • Project Execution
  • Own the analog design project execution cycle from feasibility study to silicon validation.
  • Drive technical reviews, design sign-offs, and ensure first-pass silicon success.
  • Contribute to IP and SoC-level bring-up, debug, and validation.
  • Innovation & Roadmap
  • Keep abreast of industry trends in high-speed interfaces (e.G., PCIe, Ethernet, GMSL / ASA, USB, DDR) and contribute to technology roadmap definition.
  • Drive continuous improvement in analog / mixed-signal design methodologies, flow automation, and productivity.

Required Qualifications

  • Experience : 15+ years in analog / mixed-signal IC design, with a track record of successful silicon delivery in advanced process nodes.
  • Technical Depth :
  • Expertise in design of high-speed SerDes (NRZ, PAM4), ADCs / DACs (high-speed, high-resolution), PLLs / DLLs, CTLEs, CDRs, LDOs, and other analog building blocks.
  • Strong knowledge of signal integrity, jitter analysis, noise coupling, and layout considerations.
  • Hands-on experience with Spectre, HSPICE, Verilog-A / MS, and other circuit simulators.
  • Solid understanding of system-level trade-offs (BER, jitter tolerance, channel modeling, equalization techniques, PAM4 signaling).
  • Leadership : Proven ability to lead, mentor, and grow high-performing analog design teams.
  • Process Knowledge : Experience with FinFET and advanced CMOS nodes (e.G., 28nm, 16nm, 7nm, and below).
  • Education : Master’s or PhD in Electrical Engineering (Analog / Mixed-Signal specialization preferred).
  • Preferred Skills

  • Experience with automotive-grade (AEC-Q100) and functional safety (ISO 26262) requirements.
  • Exposure to EDA flow automation, machine learning for circuit optimization, or custom design methodologies.
  • Strong publication / patent record in analog / mixed-signal design.
  • Excellent communication, cross-site collaboration, and stakeholder management skills.
  • Why Join Us

  • Opportunity to be a part of and shape a world-class analog design team.
  • Work on cutting-edge technologies in automotive and high-speed connectivity.
  • Be a key contributor to the success of next-generation semiconductor products
  • Uday

    Email : uday@mulyatech.com

    Mulya Technologies

    www.Mulyatech.Com

    "Mining the Knowledge Community"

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    Technical Manager • Bengaluru, Republic Of India, IN

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